View source for Category:Sundeep Ram Gopal AGARWAL

== Sundeep Ram Gopal AGARWAL ==

=== Executive Summary ===
Sundeep Ram Gopal AGARWAL is an inventor who has filed 1 patents. Their primary areas of innovation include Circuit design at the physical level  (physical level design for reconfigurable circuits (1 patents), Floor-planning or layout, e.g. partitioning or placement (1 patents), and they have worked with companies such as XILINX, INC. (1 patents). Their most frequent collaborators include [[Category:Aashish TRIPATHI|Aashish TRIPATHI]] (1 collaborations), [[Category:Ashit DEBNATH|Ashit DEBNATH]] (1 collaborations), [[Category:Atreyee SAHA|Atreyee SAHA]] (1 collaborations).

=== Patent Filing Activity ===
[[File:Sundeep_Ram_Gopal_AGARWAL_Monthly_Patent_Applications.png|border|800px]]

=== Technology Areas ===
[[File:Sundeep_Ram_Gopal_AGARWAL_Top_Technology_Areas.png|border|800px]]

==== List of Technology Areas ====
* [[:Category:CPC_G06F30/398|G06F30/398]] (Circuit design at the physical level  (physical level design for reconfigurable circuits): 1 patents
* [[:Category:CPC_G06F30/392|G06F30/392]] (Floor-planning or layout, e.g. partitioning or placement): 1 patents

=== Companies ===
[[File:Sundeep_Ram_Gopal_AGARWAL_Top_Companies.png|border|800px]]

==== List of Companies ====
* XILINX, INC.: 1 patents

=== Collaborators ===
* [[:Category:Aashish TRIPATHI|Aashish TRIPATHI]][[Category:Aashish TRIPATHI]] (1 collaborations)
* [[:Category:Ashit DEBNATH|Ashit DEBNATH]][[Category:Ashit DEBNATH]] (1 collaborations)
* [[:Category:Atreyee SAHA|Atreyee SAHA]][[Category:Atreyee SAHA]] (1 collaborations)
* [[:Category:Praful JAIN of San Jose CA (US)|Praful JAIN of San Jose CA (US)]][[Category:Praful JAIN of San Jose CA (US)]] (1 collaborations)

[[Category:Sundeep Ram Gopal AGARWAL]]
[[Category:Inventors]]
[[Category:Inventors filing patents with XILINX, INC.]]