Category:Marco Sforzin: Difference between revisions

Latest revision as of 06:18, 30 March 2025

Marco Sforzin

Executive Summary

Marco Sforzin is an inventor who has filed 7 patents. Their primary areas of innovation include {Single storage device} (2 patents), {using tables or multilevel address translation means ( (2 patents), {in block erasable memory, e.g. flash memory} (2 patents), and they have worked with companies such as Micron Technology, Inc. (7 patents). Their most frequent collaborators include (6 collaborations), (4 collaborations), (3 collaborations).

Patent Filing Activity

File:Marco Sforzin Monthly Patent Applications.png

Technology Areas

File:Marco Sforzin Top Technology Areas.png

List of Technology Areas

G06F3/0673 ({Single storage device}): 2 patents
G06F12/0292 ({using tables or multilevel address translation means (): 2 patents
G06F12/0246 ({in block erasable memory, e.g. flash memory}): 2 patents
G06F13/1668 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 2 patents
G11C11/5642 ({Sensing or reading circuits; Data output circuits}): 1 patents
G11C11/4074 (Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits): 1 patents
G11C11/4099 (Dummy cell treatment; Reference voltage generators): 1 patents
G06F3/0655 ({Replication mechanisms}): 1 patents
G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
G06F11/1064 ({in cache or content addressable memories}): 1 patents
G06F3/0608 ({Saving storage space on storage systems}): 1 patents
G06F3/061 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
G11C11/40626 (STATIC STORES (semiconductor memory devices): 1 patents
G11C11/40615 (STATIC STORES (semiconductor memory devices): 1 patents
G11C11/40622 (STATIC STORES (semiconductor memory devices): 1 patents
G11C11/4076 (Timing circuits (for regeneration management): 1 patents

Companies

File:Marco Sforzin Top Companies.png

List of Companies

Micron Technology, Inc.: 7 patents

Collaborators

Daniele Balluchi (6 collaborations)
Danilo Caraccio (4 collaborations)
Rishabh Dubey (3 collaborations)
Emanuele Confalonieri (3 collaborations)
Nicola Del Gatto (3 collaborations)
Paolo Amato (1 collaborations)
Luca Barletta (1 collaborations)
Marco Pietro Ferrari (1 collaborations)
Antonino Favano (1 collaborations)
Antonino Capri' (1 collaborations)
Joseph M. McCrate of Boise ID (US) (1 collaborations)
Graziano Mirichigni (1 collaborations)
Dionisio Minopoli (1 collaborations)

Subcategories

This category has the following 3 subcategories, out of 3 total.

D

► Daniele Balluchi‎ (3 C)
► Danilo Caraccio‎ (3 C)

M

► Marco Sforzin‎ (3 C)

@@ Line 2: / Line 2: @@
 === Executive Summary ===
-Marco Sforzin is an inventor who has filed 20 patents. Their primary areas of innovation include {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (2 patents), {I/O lines read out arrangements} (2 patents), {in sector programmable memories, e.g. flash disk  ( (2 patents), and they have worked with companies such as Micron Technology, Inc. (19 patents), Micron technology, Inc. (1 patents). Their most frequent collaborators include [[Category:Paolo Amato|Paolo Amato]] (15 collaborations), [[Category:Daniele Balluchi|Daniele Balluchi]] (6 collaborations), [[Category:Danilo Caraccio|Danilo Caraccio]] (4 collaborations).
+Marco Sforzin is an inventor who has filed 7 patents. Their primary areas of innovation include {Single storage device} (2 patents), {using tables or multilevel address translation means  ( (2 patents), {in block erasable memory, e.g. flash memory} (2 patents), and they have worked with companies such as Micron Technology, Inc. (7 patents). Their most frequent collaborators include [[Category:Daniele Balluchi|Daniele Balluchi]] (6 collaborations), [[Category:Danilo Caraccio|Danilo Caraccio]] (4 collaborations), [[Category:Rishabh Dubey|Rishabh Dubey]] (3 collaborations).
 === Patent Filing Activity ===
@@ Line 11: / Line 11: @@
 ==== List of Technology Areas ====
-* [[:Category:CPC_G06F3/0679|G06F3/0679]] ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 2 patents
+* [[:Category:CPC_G06F3/0673|G06F3/0673]] ({Single storage device}): 2 patents
-* [[:Category:CPC_G11C7/1069|G11C7/1069]] ({I/O lines read out arrangements}): 2 patents
+* [[:Category:CPC_G06F12/0292|G06F12/0292]] ({using tables or multilevel address translation means  (): 2 patents
-* [[:Category:CPC_G06F11/1068|G06F11/1068]] ({in sector programmable memories, e.g. flash disk  (): 2 patents
+* [[:Category:CPC_G06F12/0246|G06F12/0246]] ({in block erasable memory, e.g. flash memory}): 2 patents
-* [[:Category:CPC_G06F11/1076|G06F11/1076]] ({Parity data used in redundant arrays of independent storages, e.g. in RAID systems}): 2 patents
+* [[:Category:CPC_G06F13/1668|G06F13/1668]] (ELECTRIC DIGITAL DATA PROCESSING  (computer systems based on specific computational models): 2 patents
-* [[:Category:CPC_G11C16/102|G11C16/102]] (Programming or data input circuits): 2 patents
+* [[:Category:CPC_G11C11/5642|G11C11/5642]] ({Sensing or reading circuits; Data output circuits}): 1 patents
-* [[:Category:CPC_G11C11/5642|G11C11/5642]] ({Sensing or reading circuits; Data output circuits}): 2 patents
-* [[:Category:CPC_G06F3/0625|G06F3/0625]] ({Power saving in storage systems}): 1 patents
-* [[:Category:CPC_G06F3/0629|G06F3/0629]] ({Configuration or reconfiguration of storage systems}): 1 patents
-* [[:Category:CPC_G11C7/12|G11C7/12]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_G06F11/0793|G06F11/0793]] ({Remedial or corrective actions  (recovery from an exception in an instruction pipeline): 1 patents
-* [[:Category:CPC_G06F11/073|G06F11/073]] (Responding to the occurrence of a fault, e.g. fault tolerance): 1 patents
-* [[:Category:CPC_G06F11/10|G06F11/10]] (Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's): 1 patents
-* [[:Category:CPC_G06F11/0772|G06F11/0772]] (Responding to the occurrence of a fault, e.g. fault tolerance): 1 patents
-* [[:Category:CPC_G06F13/161|G06F13/161]] (ELECTRIC DIGITAL DATA PROCESSING  (computer systems based on specific computational models): 1 patents
-* [[:Category:CPC_G06F21/602|G06F21/602]] ({Providing cryptographic facilities or services}): 1 patents
-* [[:Category:CPC_G06F21/31|G06F21/31]] (User authentication): 1 patents
-* [[:Category:CPC_H04L9/0618|H04L9/0618]] ({Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation}): 1 patents
-* [[:Category:CPC_H04L9/32|H04L9/32]] (including means for verifying the identity or authority of a user of the system {or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials}): 1 patents
-* [[:Category:CPC_G06F21/64|G06F21/64]] (Protecting data integrity, e.g. using checksums, certificates or signatures): 1 patents
-* [[:Category:CPC_G06F12/1458|G06F12/1458]] ({by checking the subject access rights}): 1 patents
-* [[:Category:CPC_G06F12/0804|G06F12/0804]] (with main memory updating  (): 1 patents
-* [[:Category:CPC_G11C16/08|G11C16/08]] (Address circuits; Decoders; Word-line control circuits): 1 patents
-* [[:Category:CPC_G11C16/26|G11C16/26]] (Sensing or reading circuits; Data output circuits): 1 patents
-* [[:Category:CPC_G06F7/582|G06F7/582]] (Random or pseudo-random number generators): 1 patents
-* [[:Category:CPC_G11C11/4076|G11C11/4076]] (Timing circuits  (for regeneration management): 1 patents
-* [[:Category:CPC_H03K3/84|H03K3/84]] (PULSE TECHNIQUE  (measuring pulse characteristics): 1 patents
-* [[:Category:CPC_H03K19/21|H03K19/21]] (PULSE TECHNIQUE  (measuring pulse characteristics): 1 patents
-* [[:Category:CPC_G11C7/1063|G11C7/1063]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
-* [[:Category:CPC_G11C7/1057|G11C7/1057]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
-* [[:Category:CPC_G11C11/5621|G11C11/5621]] ({using charge storage in a floating gate}): 1 patents
-* [[:Category:CPC_G11C7/24|G11C7/24]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_G11C7/1012|G11C7/1012]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
-* [[:Category:CPC_G11C7/109|G11C7/109]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
-* [[:Category:CPC_G11C5/147|G11C5/147]] ({Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops  (): 1 patents
-* [[:Category:CPC_G11C11/5628|G11C11/5628]] ({Programming or writing circuits; Data input circuits}): 1 patents
 * [[:Category:CPC_G11C11/4074|G11C11/4074]] (Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits): 1 patents
 * [[:Category:CPC_G11C11/4099|G11C11/4099]] (Dummy cell treatment; Reference voltage generators): 1 patents
-* [[:Category:CPC_G11C16/12|G11C16/12]] (Programming voltage switching circuits): 1 patents
-* [[:Category:CPC_G11C16/3404|G11C16/3404]] ({Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells}): 1 patents
-* [[:Category:CPC_G11C13/0033|G11C13/0033]] (Digital stores characterised by the use of storage elements not covered by groups): 1 patents
-* [[:Category:CPC_G11C13/0004|G11C13/0004]] ({comprising amorphous/crystalline phase transition cells}): 1 patents
-* [[:Category:CPC_G11C13/0038|G11C13/0038]] ({Power supply circuits}): 1 patents
-* [[:Category:CPC_G11C13/004|G11C13/004]] ({Reading or sensing circuits or methods}): 1 patents
-* [[:Category:CPC_G11C13/0069|G11C13/0069]] ({Writing or programming circuits or methods}): 1 patents
-* [[:Category:CPC_G11C29/021|G11C29/021]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_G11C29/12005|G11C29/12005]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_G06F11/1096|G06F11/1096]] (Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's): 1 patents
 * [[:Category:CPC_G06F3/0655|G06F3/0655]] ({Replication mechanisms}): 1 patents
 * [[:Category:CPC_G06F3/0604|G06F3/0604]] (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
+* [[:Category:CPC_G06F11/1064|G06F11/1064]] ({in cache or content addressable memories}): 1 patents
+* [[:Category:CPC_G06F3/0608|G06F3/0608]] ({Saving storage space on storage systems}): 1 patents
+* [[:Category:CPC_G06F3/061|G06F3/061]] (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
+* [[:Category:CPC_G06F3/0659|G06F3/0659]] ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
+* [[:Category:CPC_G11C11/40626|G11C11/40626]] (STATIC STORES  (semiconductor memory devices): 1 patents
+* [[:Category:CPC_G11C11/40615|G11C11/40615]] (STATIC STORES  (semiconductor memory devices): 1 patents
+* [[:Category:CPC_G11C11/40622|G11C11/40622]] (STATIC STORES  (semiconductor memory devices): 1 patents
+* [[:Category:CPC_G11C11/4076|G11C11/4076]] (Timing circuits  (for regeneration management): 1 patents
 === Companies ===
@@ Line 65: / Line 33: @@
 ==== List of Companies ====
-* Micron Technology, Inc.: 19 patents
+* Micron Technology, Inc.: 7 patents
-* Micron technology, Inc.: 1 patents
 === Collaborators ===
-* [[:Category:Paolo Amato|Paolo Amato]][[Category:Paolo Amato]] (15 collaborations)
 * [[:Category:Daniele Balluchi|Daniele Balluchi]][[Category:Daniele Balluchi]] (6 collaborations)
 * [[:Category:Danilo Caraccio|Danilo Caraccio]][[Category:Danilo Caraccio]] (4 collaborations)
-* [[:Category:Luca Barletta|Luca Barletta]][[Category:Luca Barletta]] (4 collaborations)
+* [[:Category:Rishabh Dubey|Rishabh Dubey]][[Category:Rishabh Dubey]] (3 collaborations)
-* [[:Category:Marco Pietro Ferrari|Marco Pietro Ferrari]][[Category:Marco Pietro Ferrari]] (4 collaborations)
-* [[:Category:Antonino Favano|Antonino Favano]][[Category:Antonino Favano]] (4 collaborations)
 * [[:Category:Emanuele Confalonieri|Emanuele Confalonieri]][[Category:Emanuele Confalonieri]] (3 collaborations)
-* [[:Category:Riccardo Muzzetto|Riccardo Muzzetto]][[Category:Riccardo Muzzetto]] (2 collaborations)
+* [[:Category:Nicola Del Gatto|Nicola Del Gatto]][[Category:Nicola Del Gatto]] (3 collaborations)
-* [[:Category:Joseph M. McCrate of Boise ID (US)|Joseph M. McCrate of Boise ID (US)]][[Category:Joseph M. McCrate of Boise ID (US)]] (2 collaborations)
+* [[:Category:Paolo Amato|Paolo Amato]][[Category:Paolo Amato]] (1 collaborations)
-* [[:Category:Niccolò Izzo|Niccolò Izzo]][[Category:Niccolò Izzo]] (2 collaborations)
+* [[:Category:Luca Barletta|Luca Barletta]][[Category:Luca Barletta]] (1 collaborations)
-* [[:Category:Christophe Vincent Antoine Laurent|Christophe Vincent Antoine Laurent]][[Category:Christophe Vincent Antoine Laurent]] (1 collaborations)
+* [[:Category:Marco Pietro Ferrari|Marco Pietro Ferrari]][[Category:Marco Pietro Ferrari]] (1 collaborations)
-* [[:Category:John D. Porter of Boise ID (US)|John D. Porter of Boise ID (US)]][[Category:John D. Porter of Boise ID (US)]] (1 collaborations)
+* [[:Category:Antonino Favano|Antonino Favano]][[Category:Antonino Favano]] (1 collaborations)
-* [[:Category:Lingming Yang of Meridian ID (US)|Lingming Yang of Meridian ID (US)]][[Category:Lingming Yang of Meridian ID (US)]] (1 collaborations)
+* [[:Category:Antonino Capri'|Antonino Capri']][[Category:Antonino Capri']] (1 collaborations)
-* [[:Category:Nevil N. Gajera of Meridian ID (US)|Nevil N. Gajera of Meridian ID (US)]][[Category:Nevil N. Gajera of Meridian ID (US)]] (1 collaborations)
+* [[:Category:Joseph M. McCrate of Boise ID (US)|Joseph M. McCrate of Boise ID (US)]][[Category:Joseph M. McCrate of Boise ID (US)]] (1 collaborations)
-* [[:Category:Stephen S. Pawlowski of Beaverton OR (US)|Stephen S. Pawlowski of Beaverton OR (US)]][[Category:Stephen S. Pawlowski of Beaverton OR (US)]] (1 collaborations)
 * [[:Category:Graziano Mirichigni|Graziano Mirichigni]][[Category:Graziano Mirichigni]] (1 collaborations)
-* [[:Category:Massimiliano Patriarca|Massimiliano Patriarca]][[Category:Massimiliano Patriarca]] (1 collaborations)
+* [[:Category:Dionisio Minopoli|Dionisio Minopoli]][[Category:Dionisio Minopoli]] (1 collaborations)
-* [[:Category:Innocenzo Tortorelli|Innocenzo Tortorelli]][[Category:Innocenzo Tortorelli]] (1 collaborations)
 [[Category:Marco Sforzin]]
 [[Category:Inventors]]
 [[Category:Inventors filing patents with Micron Technology, Inc.]]
-[[Category:Inventors filing patents with Micron technology, Inc.]]