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=== Executive Summary ===
=== Executive Summary ===
Kuo-Cheng CHIANG is an inventor who has filed 7 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (7 patents). Their most frequent collaborators include [[Category:Chih-Hao WANG|Chih-Hao WANG]] (7 collaborations), [[Category:Chia-Hao CHANG|Chia-Hao CHANG]] (3 collaborations), [[Category:Jia-Chuan YOU|Jia-Chuan YOU]] (3 collaborations).
Kuo-Cheng CHIANG is an inventor who has filed 9 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (6 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (3 patents). Their most frequent collaborators include [[Category:Chih-Hao WANG|Chih-Hao WANG]] (7 collaborations), [[Category:Chia-Hao CHANG|Chia-Hao CHANG]] (3 collaborations), [[Category:Kuan-Ting PAN|Kuan-Ting PAN]] (3 collaborations).


=== Patent Filing Activity ===
=== Patent Filing Activity ===
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==== List of Technology Areas ====
==== List of Technology Areas ====
* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L29/66439|H01L29/66439]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L29/66439|H01L29/66439]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L29/78696|H01L29/78696]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
* [[:Category:CPC_H01L29/66545|H01L29/66545]] ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 4 patents
* [[:Category:CPC_H01L29/41775|H01L29/41775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L29/78696|H01L29/78696]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L21/76224|H01L21/76224]] ({using trench refilling with dielectric materials  (trench filling with polycristalline silicon): 2 patents
* [[:Category:CPC_H01L21/823481|H01L21/823481]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
* [[:Category:CPC_H01L27/088|H01L27/088]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L27/088|H01L27/088]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L29/0665|H01L29/0665]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L29/41733|H01L29/41733]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L29/66742|H01L29/66742]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H10D84/038|H10D84/038]] (No explanation available): 2 patents
* [[:Category:CPC_H01L21/823807|H01L21/823807]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823437|H01L21/823437]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823828|H01L21/823828]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/28518|H01L21/28518]] (from a gas or vapour, e.g. condensation): 1 patents
* [[:Category:CPC_H01L27/092|H01L27/092]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/45|H01L29/45]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/0653|H01L29/0653]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/78651|H01L29/78651]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/764|H01L21/764]] (Making of isolation regions between components): 1 patents
* [[:Category:CPC_H01L29/42384|H01L29/42384]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/0847|H01L29/0847]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/785|H01L29/785]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/66545|H01L29/66545]] ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 1 patents
* [[:Category:CPC_H01L2029/7858|H01L2029/7858]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/76229|H01L21/76229]] (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
* [[:Category:CPC_H01L23/535|H01L23/535]] (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents
* [[:Category:CPC_H01L29/4175|H01L29/4175]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/76897|H01L21/76897]] ({Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step  (self-aligned silicidation on field effect transistors): 1 patents
* [[:Category:CPC_H01L29/401|H01L29/401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/401|H01L29/401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/66553|H01L29/66553]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 1 patents
* [[:Category:CPC_H01Q21/0043|H01Q21/0043]] ({Slotted waveguides  (combination with horns): 1 patents
* [[:Category:CPC_H01L21/28123|H01L21/28123]] ({Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects}): 1 patents
* [[:Category:CPC_H01P3/16|H01P3/16]] (Dielectric waveguides, i.e. without a longitudinal conductor): 1 patents
* [[:Category:CPC_H01L21/0259|H01L21/0259]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01Q1/3233|H01Q1/3233]] ({particular used as part of a sensor or in a security system, e.g. for automotive radar, navigation systems}): 1 patents
* [[:Category:CPC_H01Q13/0233|H01Q13/0233]] ({Horns fed by a slotted waveguide array  (biconical horns): 1 patents
* [[:Category:CPC_H01L21/76802|H01L21/76802]] (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
* [[:Category:CPC_H10D84/0147|H10D84/0147]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/0149|H10D84/0149]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/834|H10D84/834]] (No explanation available): 1 patents
* [[:Category:CPC_H01L21/76843|H01L21/76843]] ({formed in openings in a dielectric}): 1 patents
* [[:Category:CPC_H01L21/76871|H01L21/76871]] ({Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers}): 1 patents
* [[:Category:CPC_H01L21/823412|H01L21/823412]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823412|H01L21/823412]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823418|H01L21/823418]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823468|H01L21/823468]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823475|H01L21/823475]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823475|H01L21/823475]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823481|H01L21/823481]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L29/0847|H01L29/0847]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/823468|H01L21/823468]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L29/41733|H01L29/41733]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/42364|H01L29/42364]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/4238|H01L29/4238]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/6656|H01L29/6656]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 1 patents
* [[:Category:CPC_H01L29/6656|H01L29/6656]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 1 patents
* [[:Category:CPC_H01L29/78618|H01L29/78618]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/823807|H01L21/823807]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H10D84/834|H10D84/834]] (No explanation available): 1 patents
* [[:Category:CPC_H01L27/092|H01L27/092]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H10D30/0243|H10D30/0243]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/6735|H10D30/6735]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/6211|H10D30/6211]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/014|H10D30/014]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/6215|H10D30/6215]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/43|H10D30/43]] (No explanation available): 1 patents
* [[:Category:CPC_H10D62/118|H10D62/118]] (No explanation available): 1 patents
* [[:Category:CPC_H10D30/6757|H10D30/6757]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/0128|H10D84/0128]] (No explanation available): 1 patents
* [[:Category:CPC_H10D62/121|H10D62/121]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/0158|H10D84/0158]] (No explanation available): 1 patents
* [[:Category:CPC_H10D64/017|H10D64/017]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/038|H10D84/038]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/0167|H10D84/0167]] (No explanation available): 1 patents
* [[:Category:CPC_H10D84/85|H10D84/85]] (No explanation available): 1 patents


=== Companies ===
=== Companies ===
Line 56: Line 62:


==== List of Companies ====
==== List of Companies ====
* Taiwan Semiconductor Manufacturing Co., Ltd.: 7 patents
* Taiwan Semiconductor Manufacturing Company, Ltd.: 6 patents
* TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 3 patents


=== Collaborators ===
=== Collaborators ===
* [[:Category:Chih-Hao WANG|Chih-Hao WANG]][[Category:Chih-Hao WANG]] (7 collaborations)
* [[:Category:Chih-Hao WANG|Chih-Hao WANG]][[Category:Chih-Hao WANG]] (7 collaborations)
* [[:Category:Chia-Hao CHANG|Chia-Hao CHANG]][[Category:Chia-Hao CHANG]] (3 collaborations)
* [[:Category:Chia-Hao CHANG|Chia-Hao CHANG]][[Category:Chia-Hao CHANG]] (3 collaborations)
* [[:Category:Kuan-Ting PAN|Kuan-Ting PAN]][[Category:Kuan-Ting PAN]] (3 collaborations)
* [[:Category:Jia-Chuan YOU|Jia-Chuan YOU]][[Category:Jia-Chuan YOU]] (3 collaborations)
* [[:Category:Jia-Chuan YOU|Jia-Chuan YOU]][[Category:Jia-Chuan YOU]] (3 collaborations)
* [[:Category:Huan-Chieh SU|Huan-Chieh SU]][[Category:Huan-Chieh SU]] (3 collaborations)
* [[:Category:Chun-Yuan CHEN|Chun-Yuan CHEN]][[Category:Chun-Yuan CHEN]] (2 collaborations)
* [[:Category:Chu-Yuan HSU|Chu-Yuan HSU]][[Category:Chu-Yuan HSU]] (2 collaborations)
* [[:Category:Chu-Yuan HSU|Chu-Yuan HSU]][[Category:Chu-Yuan HSU]] (2 collaborations)
* [[:Category:Szu-Chien WU|Szu-Chien WU]][[Category:Szu-Chien WU]] (1 collaborations)
* [[:Category:Shi-Ning JU|Shi-Ning JU]][[Category:Shi-Ning JU]] (1 collaborations)
* [[:Category:Chih-Hao Wang|Chih-Hao Wang]][[Category:Chih-Hao Wang]] (1 collaborations)
* [[:Category:Kuan-Ting Pan|Kuan-Ting Pan]][[Category:Kuan-Ting Pan]] (1 collaborations)
* [[:Category:Shang-Wen CHANG|Shang-Wen CHANG]][[Category:Shang-Wen CHANG]] (1 collaborations)
* [[:Category:Ching-Wei TSAI|Ching-Wei TSAI]][[Category:Ching-Wei TSAI]] (1 collaborations)
* [[:Category:Kuan-Lun CHENG|Kuan-Lun CHENG]][[Category:Kuan-Lun CHENG]] (1 collaborations)
* [[:Category:I-Han HUANG|I-Han HUANG]][[Category:I-Han HUANG]] (1 collaborations)
* [[:Category:Chung-Wei HSU|Chung-Wei HSU]][[Category:Chung-Wei HSU]] (1 collaborations)
* [[:Category:Chung-Wei HSU|Chung-Wei HSU]][[Category:Chung-Wei HSU]] (1 collaborations)
* [[:Category:Lung-Kun CHU|Lung-Kun CHU]][[Category:Lung-Kun CHU]] (1 collaborations)
* [[:Category:Lung-Kun CHU|Lung-Kun CHU]][[Category:Lung-Kun CHU]] (1 collaborations)
Line 68: Line 86:
* [[:Category:Chun-Fu LU|Chun-Fu LU]][[Category:Chun-Fu LU]] (1 collaborations)
* [[:Category:Chun-Fu LU|Chun-Fu LU]][[Category:Chun-Fu LU]] (1 collaborations)
* [[:Category:Shih-Hao LAI|Shih-Hao LAI]][[Category:Shih-Hao LAI]] (1 collaborations)
* [[:Category:Shih-Hao LAI|Shih-Hao LAI]][[Category:Shih-Hao LAI]] (1 collaborations)
* [[:Category:Jung-Hung CHANG|Jung-Hung CHANG]][[Category:Jung-Hung CHANG]] (1 collaborations)
* [[:Category:Shih-Cheng CHEN|Shih-Cheng CHEN]][[Category:Shih-Cheng CHEN]] (1 collaborations)
* [[:Category:Chia-Hao YU|Chia-Hao YU]][[Category:Chia-Hao YU]] (1 collaborations)
* [[:Category:Chia-Cheng TSAI|Chia-Cheng TSAI]][[Category:Chia-Cheng TSAI]] (1 collaborations)
* [[:Category:Hsien-Chih HUANG|Hsien-Chih HUANG]][[Category:Hsien-Chih HUANG]] (1 collaborations)
* [[:Category:Guan-Lin CHEN|Guan-Lin CHEN]][[Category:Guan-Lin CHEN]] (1 collaborations)
* [[:Category:Shi Ning JU|Shi Ning JU]][[Category:Shi Ning JU]] (1 collaborations)
* [[:Category:Lo-Heng CHANG|Lo-Heng CHANG]][[Category:Lo-Heng CHANG]] (1 collaborations)
* [[:Category:Huan-Chieh SU|Huan-Chieh SU]][[Category:Huan-Chieh SU]] (1 collaborations)
* [[:Category:Chun-Yuan CHEN|Chun-Yuan CHEN]][[Category:Chun-Yuan CHEN]] (1 collaborations)
* [[:Category:Li-Yang CHUANG|Li-Yang CHUANG]][[Category:Li-Yang CHUANG]] (1 collaborations)


[[Category:Kuo-Cheng CHIANG]]
[[Category:Kuo-Cheng CHIANG]]
[[Category:Inventors]]
[[Category:Inventors]]
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Co., Ltd.]]
[[Category:Inventors filing patents with TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Company, Ltd.]]

Revision as of 04:23, 31 March 2025

Kuo-Cheng CHIANG

Executive Summary

Kuo-Cheng CHIANG is an inventor who has filed 9 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (6 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (3 patents). Their most frequent collaborators include (7 collaborations), (3 collaborations), (3 collaborations).

Patent Filing Activity

File:Kuo-Cheng CHIANG Monthly Patent Applications.png

Technology Areas

File:Kuo-Cheng CHIANG Top Technology Areas.png

List of Technology Areas

  • H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 4 patents
  • H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L29/41733 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H10D84/038 (No explanation available): 2 patents
  • H01L21/823437 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/28518 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L29/45 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/78651 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/42384 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/785 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2029/7858 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/535 (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents
  • H01L21/76897 ({Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step (self-aligned silicidation on field effect transistors): 1 patents
  • H01L29/401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01Q21/0043 ({Slotted waveguides (combination with horns): 1 patents
  • H01P3/16 (Dielectric waveguides, i.e. without a longitudinal conductor): 1 patents
  • H01Q1/3233 ({particular used as part of a sensor or in a security system, e.g. for automotive radar, navigation systems}): 1 patents
  • H01Q13/0233 ({Horns fed by a slotted waveguide array (biconical horns): 1 patents
  • H01L21/76802 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
  • H10D84/0147 (No explanation available): 1 patents
  • H10D84/0149 (No explanation available): 1 patents
  • H10D84/834 (No explanation available): 1 patents
  • H01L21/76843 ({formed in openings in a dielectric}): 1 patents
  • H01L21/76871 ({Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers}): 1 patents
  • H01L21/823412 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/823418 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/823468 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/6656 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 1 patents
  • H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H10D30/6735 (No explanation available): 1 patents
  • H10D30/014 (No explanation available): 1 patents
  • H10D30/43 (No explanation available): 1 patents
  • H10D30/6757 (No explanation available): 1 patents
  • H10D62/121 (No explanation available): 1 patents
  • H10D64/017 (No explanation available): 1 patents
  • H10D84/0167 (No explanation available): 1 patents
  • H10D84/85 (No explanation available): 1 patents

Companies

File:Kuo-Cheng CHIANG Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Company, Ltd.: 6 patents
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 3 patents

Collaborators

Subcategories

This category has the following 5 subcategories, out of 5 total.

C

F

K

L

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