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Category:Ming-Hsiu LEE: Difference between revisions - WikiTrademarks Jump to content

Category:Ming-Hsiu LEE: Difference between revisions

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=== Executive Summary ===
=== Executive Summary ===
Ming-Hsiu LEE is an inventor who has filed 8 patents. Their primary areas of innovation include {Improving the reliability of storage systems} (1 patents), {Command handling arrangements, e.g. command buffers, queues, command scheduling} (1 patents), {Single storage device} (1 patents), and they have worked with companies such as MACRONIX INTERNATIONAL CO., LTD. (8 patents). Their most frequent collaborators include [[Category:Feng-Min LEE|Feng-Min LEE]] (6 collaborations), [[Category:Po-Hao TSENG|Po-Hao TSENG]] (5 collaborations), [[Category:Dai-Ying LEE|Dai-Ying LEE]] (3 collaborations).
Ming-Hsiu LEE is an inventor who has filed 2 patents. Their primary areas of innovation include {Reading or sensing circuits or methods} (1 patents), for evaluating functions by calculation {( (1 patents), {comprising cells having several storage transistors connected in series} (1 patents), and they have worked with companies such as MACRONIX INTERNATIONAL CO., LTD. (2 patents). Their most frequent collaborators include [[Category:Yu-Yu LIN|Yu-Yu LIN]] (1 collaborations), [[Category:Feng-Min LEE|Feng-Min LEE]] (1 collaborations), [[Category:Po-Hao TSENG|Po-Hao TSENG]] (1 collaborations).


=== Patent Filing Activity ===
=== Patent Filing Activity ===
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==== List of Technology Areas ====
==== List of Technology Areas ====
* [[:Category:CPC_G06F3/0614|G06F3/0614]] ({Improving the reliability of storage systems}): 1 patents
* [[:Category:CPC_G06F3/0659|G06F3/0659]] ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
* [[:Category:CPC_G06F3/0673|G06F3/0673]] ({Single storage device}): 1 patents
* [[:Category:CPC_G11C15/04|G11C15/04]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C15/046|G11C15/046]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C16/0475|G11C16/0475]] ({comprising two or more independent storage sites which store independent data}): 1 patents
* [[:Category:CPC_G11C2211/4016|G11C2211/4016]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C13/004|G11C13/004]] ({Reading or sensing circuits or methods}): 1 patents
* [[:Category:CPC_G11C13/004|G11C13/004]] ({Reading or sensing circuits or methods}): 1 patents
* [[:Category:CPC_G06F7/5443|G06F7/5443]] (for evaluating functions by calculation {(): 1 patents
* [[:Category:CPC_G06F7/5443|G06F7/5443]] (for evaluating functions by calculation {(): 1 patents
* [[:Category:CPC_G11C11/4096|G11C11/4096]] (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 1 patents
* [[:Category:CPC_G11C16/0483|G11C16/0483]] ({comprising cells having several storage transistors connected in series}): 1 patents
* [[:Category:CPC_G11C11/405|G11C11/405]] (with three charge-transfer gates, e.g. MOS transistors, per cell): 1 patents
* [[:Category:CPC_G11C5/063|G11C5/063]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C16/102|G11C16/102]] (Programming or data input circuits): 1 patents
* [[:Category:CPC_G11C16/10|G11C16/10]] (Programming or data input circuits): 1 patents
* [[:Category:CPC_G11C16/26|G11C16/26]] (Sensing or reading circuits; Data output circuits): 1 patents
* [[:Category:CPC_G11C16/3459|G11C16/3459]] ({Circuits or methods to verify correct programming of nonvolatile memory cells}): 1 patents
* [[:Category:CPC_G11C29/40|G11C29/40]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C2029/4002|G11C2029/4002]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C7/1069|G11C7/1069]] ({I/O lines read out arrangements}): 1 patents
* [[:Category:CPC_G11C7/14|G11C7/14]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C8/08|G11C8/08]] (Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines): 1 patents
* [[:Category:CPC_H10B63/845|H10B63/845]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B61/22|H10B61/22]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B63/34|H10B63/34]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10N50/01|H10N50/01]] (No explanation available): 1 patents
* [[:Category:CPC_H10N70/066|H10N70/066]] (No explanation available): 1 patents
* [[:Category:CPC_G11C7/1063|G11C7/1063]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
* [[:Category:CPC_G11C7/109|G11C7/109]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
* [[:Category:CPC_G11C7/1006|G11C7/1006]] ({Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}): 1 patents


=== Companies ===
=== Companies ===
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==== List of Companies ====
==== List of Companies ====
* MACRONIX INTERNATIONAL CO., LTD.: 8 patents
* MACRONIX INTERNATIONAL CO., LTD.: 2 patents


=== Collaborators ===
=== Collaborators ===
* [[:Category:Feng-Min LEE|Feng-Min LEE]][[Category:Feng-Min LEE]] (6 collaborations)
* [[:Category:Yu-Yu LIN|Yu-Yu LIN]][[Category:Yu-Yu LIN]] (1 collaborations)
* [[:Category:Po-Hao TSENG|Po-Hao TSENG]][[Category:Po-Hao TSENG]] (5 collaborations)
* [[:Category:Feng-Min LEE|Feng-Min LEE]][[Category:Feng-Min LEE]] (1 collaborations)
* [[:Category:Dai-Ying LEE|Dai-Ying LEE]][[Category:Dai-Ying LEE]] (3 collaborations)
* [[:Category:Po-Hao TSENG|Po-Hao TSENG]][[Category:Po-Hao TSENG]] (1 collaborations)
* [[:Category:Yu-Yu LIN|Yu-Yu LIN]][[Category:Yu-Yu LIN]] (2 collaborations)
* [[:Category:Yu-Hsuan LIN|Yu-Hsuan LIN]][[Category:Yu-Hsuan LIN]] (2 collaborations)
* [[:Category:Yun-Yuan WANG|Yun-Yuan WANG]][[Category:Yun-Yuan WANG]] (2 collaborations)
* [[:Category:Cheng-Hsien LU|Cheng-Hsien LU]][[Category:Cheng-Hsien LU]] (2 collaborations)
* [[:Category:Tian-Cih BO|Tian-Cih BO]][[Category:Tian-Cih BO]] (1 collaborations)
* [[:Category:Erh-Kun LAI|Erh-Kun LAI]][[Category:Erh-Kun LAI]] (1 collaborations)


[[Category:Ming-Hsiu LEE]]
[[Category:Ming-Hsiu LEE]]
[[Category:Inventors]]
[[Category:Inventors]]
[[Category:Inventors filing patents with MACRONIX INTERNATIONAL CO., LTD.]]
[[Category:Inventors filing patents with MACRONIX INTERNATIONAL CO., LTD.]]

Latest revision as of 04:26, 28 March 2025

Ming-Hsiu LEE

Executive Summary

Ming-Hsiu LEE is an inventor who has filed 2 patents. Their primary areas of innovation include {Reading or sensing circuits or methods} (1 patents), for evaluating functions by calculation {( (1 patents), {comprising cells having several storage transistors connected in series} (1 patents), and they have worked with companies such as MACRONIX INTERNATIONAL CO., LTD. (2 patents). Their most frequent collaborators include (1 collaborations), (1 collaborations), (1 collaborations).

Patent Filing Activity

File:Ming-Hsiu LEE Monthly Patent Applications.png

Technology Areas

File:Ming-Hsiu LEE Top Technology Areas.png

List of Technology Areas

  • G11C13/004 ({Reading or sensing circuits or methods}): 1 patents
  • G06F7/5443 (for evaluating functions by calculation {(): 1 patents
  • G11C16/0483 ({comprising cells having several storage transistors connected in series}): 1 patents
  • G11C5/063 (STATIC STORES (semiconductor memory devices): 1 patents
  • G11C16/10 (Programming or data input circuits): 1 patents

Companies

File:Ming-Hsiu LEE Top Companies.png

List of Companies

  • MACRONIX INTERNATIONAL CO., LTD.: 2 patents

Collaborators

Subcategories

This category has the following 8 subcategories, out of 8 total.

C

D

F

M

P

Y

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