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Category:Mutsumi OKAJIMA: Difference between revisions

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=== Executive Summary ===
=== Executive Summary ===
Mutsumi OKAJIMA is an inventor who has filed 8 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (3 patents), ELECTRONIC MEMORY DEVICES (3 patents), ELECTRONIC MEMORY DEVICES (2 patents), and they have worked with companies such as Kioxia Corporation (8 patents). Their most frequent collaborators include [[Category:Takafumi MASUDA|Takafumi MASUDA]] (6 collaborations), [[Category:Nobuyoshi SAITO|Nobuyoshi SAITO]] (6 collaborations), [[Category:Keiji IKEDA|Keiji IKEDA]] (6 collaborations).
Mutsumi OKAJIMA is an inventor who has filed 3 patents. Their primary areas of innovation include {Geometry or} layout of the interconnection structure {( (1 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (1 patents), ELECTRONIC MEMORY DEVICES (1 patents), and they have worked with companies such as Kioxia Corporation (3 patents). Their most frequent collaborators include [[Category:Takafumi MASUDA|Takafumi MASUDA]] (2 collaborations), [[Category:Nobuyoshi SAITO|Nobuyoshi SAITO]] (2 collaborations), [[Category:Keiji IKEDA|Keiji IKEDA]] (2 collaborations).


=== Patent Filing Activity ===
=== Patent Filing Activity ===
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==== List of Technology Areas ====
==== List of Technology Areas ====
* [[:Category:CPC_H10B12/30|H10B12/30]] (ELECTRONIC MEMORY DEVICES): 3 patents
* [[:Category:CPC_H10B12/05|H10B12/05]] (ELECTRONIC MEMORY DEVICES): 3 patents
* [[:Category:CPC_H10B12/03|H10B12/03]] (ELECTRONIC MEMORY DEVICES): 2 patents
* [[:Category:CPC_H10B12/482|H10B12/482]] (ELECTRONIC MEMORY DEVICES): 2 patents
* [[:Category:CPC_H10B12/33|H10B12/33]] (ELECTRONIC MEMORY DEVICES): 2 patents
* [[:Category:CPC_H10B12/02|H10B12/02]] (ELECTRONIC MEMORY DEVICES): 2 patents
* [[:Category:CPC_G11C5/10|G11C5/10]] (STATIC STORES  (semiconductor memory devices): 2 patents
* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 1 patents
* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 1 patents
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/528|H01L23/528]] ({Geometry or} layout of the interconnection structure {(): 1 patents
* [[:Category:CPC_H10B53/10|H10B53/10]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B12/315|H10B12/315]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B53/20|H10B53/20]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_G11C11/4097|G11C11/4097]] (Bit-line organisation, e.g. bit-line layout, folded bit lines): 1 patents
* [[:Category:CPC_G11C5/06|G11C5/06]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_G11C11/4096|G11C11/4096]] (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 1 patents
* [[:Category:CPC_G11C11/2273|G11C11/2273]] ({Reading or sensing circuits or methods}): 1 patents
* [[:Category:CPC_G11C5/063|G11C5/063]] (STATIC STORES  (semiconductor memory devices): 1 patents
* [[:Category:CPC_H10B51/10|H10B51/10]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B51/20|H10B51/20]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B12/30|H10B12/30]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H01L24/08|H01L24/08]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L25/0657|H01L25/0657]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L25/18|H01L25/18]] (the devices being of types provided for in two or more different subgroups of the same main group of groups): 1 patents
* [[:Category:CPC_H10B12/03|H10B12/03]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B12/05|H10B12/05]] (ELECTRONIC MEMORY DEVICES): 1 patents
* [[:Category:CPC_H10B80/00|H10B80/00]] (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
* [[:Category:CPC_H01L2224/08145|H01L2224/08145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2924/1431|H01L2924/1431]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2924/1436|H01L2924/1436]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents


=== Companies ===
=== Companies ===
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==== List of Companies ====
==== List of Companies ====
* Kioxia Corporation: 8 patents
* Kioxia Corporation: 3 patents


=== Collaborators ===
=== Collaborators ===
* [[:Category:Takafumi MASUDA|Takafumi MASUDA]][[Category:Takafumi MASUDA]] (6 collaborations)
* [[:Category:Takafumi MASUDA|Takafumi MASUDA]][[Category:Takafumi MASUDA]] (2 collaborations)
* [[:Category:Nobuyoshi SAITO|Nobuyoshi SAITO]][[Category:Nobuyoshi SAITO]] (6 collaborations)
* [[:Category:Nobuyoshi SAITO|Nobuyoshi SAITO]][[Category:Nobuyoshi SAITO]] (2 collaborations)
* [[:Category:Keiji IKEDA|Keiji IKEDA]][[Category:Keiji IKEDA]] (6 collaborations)
* [[:Category:Keiji IKEDA|Keiji IKEDA]][[Category:Keiji IKEDA]] (2 collaborations)
* [[:Category:Kotaro NODA|Kotaro NODA]][[Category:Kotaro NODA]] (2 collaborations)
* [[:Category:Takanori AKITA|Takanori AKITA]][[Category:Takanori AKITA]] (2 collaborations)
* [[:Category:Takahiro FUJII|Takahiro FUJII]][[Category:Takahiro FUJII]] (1 collaborations)
* [[:Category:Seiichi URAKAWA|Seiichi URAKAWA]][[Category:Seiichi URAKAWA]] (1 collaborations)


[[Category:Mutsumi OKAJIMA]]
[[Category:Mutsumi OKAJIMA]]
[[Category:Inventors]]
[[Category:Inventors]]
[[Category:Inventors filing patents with Kioxia Corporation]]
[[Category:Inventors filing patents with Kioxia Corporation]]

Latest revision as of 01:14, 30 March 2025

Mutsumi OKAJIMA

Executive Summary

Mutsumi OKAJIMA is an inventor who has filed 3 patents. Their primary areas of innovation include {Geometry or} layout of the interconnection structure {( (1 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (1 patents), ELECTRONIC MEMORY DEVICES (1 patents), and they have worked with companies such as Kioxia Corporation (3 patents). Their most frequent collaborators include (2 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

File:Mutsumi OKAJIMA Monthly Patent Applications.png

Technology Areas

File:Mutsumi OKAJIMA Top Technology Areas.png

List of Technology Areas

  • H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H10B53/10 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10B53/20 (ELECTRONIC MEMORY DEVICES): 1 patents
  • G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
  • G11C11/2273 ({Reading or sensing circuits or methods}): 1 patents
  • H10B51/10 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10B51/20 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10B12/30 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 1 patents
  • H10B12/03 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10B12/05 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1436 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

File:Mutsumi OKAJIMA Top Companies.png

List of Companies

  • Kioxia Corporation: 3 patents

Collaborators

Subcategories

This category has the following 4 subcategories, out of 4 total.

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