Category:Koji SAKUI: Difference between revisions

Latest revision as of 09:21, 31 March 2025

Koji SAKUI

Executive Summary

Koji SAKUI is an inventor who has filed 4 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (3 patents), Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches (2 patents), {Geometry or} layout of the interconnection structure {( (1 patents), and they have worked with companies such as Unisantis Electronics Singapore Pte. Ltd. (3 patents), UNISANTIS ELECTRONICS SINGAPORE PTE. LTD. (1 patents). Their most frequent collaborators include (4 collaborations), (2 collaborations), (1 collaborations).

Patent Filing Activity

File:Koji SAKUI Monthly Patent Applications.png

Technology Areas

File:Koji SAKUI Top Technology Areas.png

List of Technology Areas

H10B12/20 (ELECTRONIC MEMORY DEVICES): 3 patents
G11C11/4096 (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 2 patents
H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
H01L29/0692 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H01L29/42372 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H01L29/66666 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H01L29/7869 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H10B43/27 (ELECTRONIC MEMORY DEVICES): 1 patents
G11C11/4097 (Bit-line organisation, e.g. bit-line layout, folded bit lines): 1 patents
G11C11/404 (with one charge-transfer gate, e.g. MOS transistor, per cell): 1 patents

Companies

File:Koji SAKUI Top Companies.png

List of Companies

Unisantis Electronics Singapore Pte. Ltd.: 3 patents
UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.: 1 patents

Collaborators

Nozomu HARADA (4 collaborations)
Masakazu KAKUMU (2 collaborations)
Iwao KUNISHIMA (1 collaborations)

Subcategories

This category has the following 8 subcategories, out of 8 total.

I

► Iwao KUNISHIMA‎ (4 C)

K

► Koji SAKUI‎ (8 C)

M

► Masakazu KAKUMU‎ (4 C)

N

► Norio CHUJO‎ (4 C)
► Nozomu HARADA‎ (4 C)

S

► Shinji SUGATANI‎ (4 C)

T

► Tadashi FUKUDA‎ (4 C)
► Takayuki OHBA‎ (4 C)

@@ Line 2: / Line 2: @@
 === Executive Summary ===
-Koji SAKUI is an inventor who has filed 4 patents. Their primary areas of innovation include {Geometry or} layout of the interconnection structure {( (2 patents), to produce devices, e.g. integrated circuits, each consisting of a plurality of components (2 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (2 patents), and they have worked with companies such as ADVANTEST CORPORATION (4 patents). Their most frequent collaborators include [[Category:Shinji SUGATANI|Shinji SUGATANI]] (4 collaborations), [[Category:Takayuki OHBA|Takayuki OHBA]] (4 collaborations), [[Category:Norio CHUJO|Norio CHUJO]] (4 collaborations).
+Koji SAKUI is an inventor who has filed 4 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (3 patents), Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches (2 patents), {Geometry or} layout of the interconnection structure {( (1 patents), and they have worked with companies such as Unisantis Electronics Singapore Pte. Ltd. (3 patents), UNISANTIS ELECTRONICS SINGAPORE PTE. LTD. (1 patents). Their most frequent collaborators include [[Category:Nozomu HARADA|Nozomu HARADA]] (4 collaborations), [[Category:Masakazu KAKUMU|Masakazu KAKUMU]] (2 collaborations), [[Category:Iwao KUNISHIMA|Iwao KUNISHIMA]] (1 collaborations).
 === Patent Filing Activity ===
@@ Line 11: / Line 11: @@
 ==== List of Technology Areas ====
-* [[:Category:CPC_H01L23/528|H01L23/528]] ({Geometry or} layout of the interconnection structure {(): 2 patents
+* [[:Category:CPC_H10B12/20|H10B12/20]] (ELECTRONIC MEMORY DEVICES): 3 patents
-* [[:Category:CPC_H01L21/823871|H01L21/823871]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
+* [[:Category:CPC_G11C11/4096|G11C11/4096]] (Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches): 2 patents
-* [[:Category:CPC_H01L27/092|H01L27/092]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 1 patents
-* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_H01L23/528|H01L23/528]] ({Geometry or} layout of the interconnection structure {(): 1 patents
-* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_H01L29/0692|H01L29/0692]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
-* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_H01L29/42372|H01L29/42372]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
-* [[:Category:CPC_H01L24/08|H01L24/08]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_H01L29/66666|H01L29/66666]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
-* [[:Category:CPC_H01L21/76898|H01L21/76898]] ({formed through a semiconductor substrate}): 2 patents
+* [[:Category:CPC_H01L29/7869|H01L29/7869]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
-* [[:Category:CPC_H01L23/481|H01L23/481]] (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 2 patents
+* [[:Category:CPC_H10B43/27|H10B43/27]] (ELECTRONIC MEMORY DEVICES): 1 patents
-* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+* [[:Category:CPC_G11C11/4097|G11C11/4097]] (Bit-line organisation, e.g. bit-line layout, folded bit lines): 1 patents
-* [[:Category:CPC_H01L24/80|H01L24/80]] ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
+* [[:Category:CPC_G11C11/404|G11C11/404]] (with one charge-transfer gate, e.g. MOS transistor, per cell): 1 patents
-* [[:Category:CPC_H01L2224/08145|H01L2224/08145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
-* [[:Category:CPC_H01L2224/80895|H01L2224/80895]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
-* [[:Category:CPC_H01L2224/80896|H01L2224/80896]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 === Companies ===
@@ Line 30: / Line 27: @@
 ==== List of Companies ====
-* ADVANTEST CORPORATION: 4 patents
+* Unisantis Electronics Singapore Pte. Ltd.: 3 patents
+* UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.: 1 patents
 === Collaborators ===
-* [[:Category:Shinji SUGATANI|Shinji SUGATANI]][[Category:Shinji SUGATANI]] (4 collaborations)
+* [[:Category:Nozomu HARADA|Nozomu HARADA]][[Category:Nozomu HARADA]] (4 collaborations)
-* [[:Category:Takayuki OHBA|Takayuki OHBA]][[Category:Takayuki OHBA]] (4 collaborations)
+* [[:Category:Masakazu KAKUMU|Masakazu KAKUMU]][[Category:Masakazu KAKUMU]] (2 collaborations)
-* [[:Category:Norio CHUJO|Norio CHUJO]][[Category:Norio CHUJO]] (4 collaborations)
+* [[:Category:Iwao KUNISHIMA|Iwao KUNISHIMA]][[Category:Iwao KUNISHIMA]] (1 collaborations)
-* [[:Category:Tadashi FUKUDA|Tadashi FUKUDA]][[Category:Tadashi FUKUDA]] (2 collaborations)
 [[Category:Koji SAKUI]]
 [[Category:Inventors]]
-[[Category:Inventors filing patents with ADVANTEST CORPORATION]]
+[[Category:Inventors filing patents with Unisantis Electronics Singapore Pte. Ltd.]]
+[[Category:Inventors filing patents with UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.]]