Category:RAJA SWAMINATHAN of AUSTIN TX (US)

RAJA SWAMINATHAN of AUSTIN TX (US)

Executive Summary

RAJA SWAMINATHAN of AUSTIN TX (US) is an inventor who has filed 7 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), {Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected} (2 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (2 patents), and they have worked with companies such as ADVANCED MICRO DEVICES, INC. (7 patents). Their most frequent collaborators include (4 collaborations), (3 collaborations), (1 collaborations).

Patent Filing Activity

File:RAJA SWAMINATHAN of AUSTIN TX (US) Monthly Patent Applications.png

Technology Areas

File:RAJA SWAMINATHAN of AUSTIN TX (US) Top Technology Areas.png

List of Technology Areas

• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• G02B6/4274 (Coupling light guides with opto-electronic elements): 1 patents
• G02B6/4255 (Coupling light guides with opto-electronic elements): 1 patents
• G02B6/425 (Coupling light guides with opto-electronic elements): 1 patents
• G02B6/43 (Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections): 1 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/16 (Fillings or auxiliary members in containers {or encapsulations}, e.g. centering rings (): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 1 patents
• H01L21/50 (Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups): 1 patents
• H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L27/0688 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06527 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/381 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/92 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/9211 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 1 patents
• H01L2224/08146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06544 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1206 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1432 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/37001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 1 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L21/6835 ({using temporarily an auxiliary support}): 1 patents

Companies

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List of Companies

• ADVANCED MICRO DEVICES, INC.: 7 patents

Collaborators

• RAHUL AGARWAL of LIVERMORE CA (US) (4 collaborations)
• GABRIEL H. LOH of BELLEVUE WA (US) (3 collaborations)
• BRETT P. WILKERSON of AUSTIN TX (US) (1 collaborations)
• KONG TOON NG (1 collaborations)
• MICHAEL S. ALFANO of AUSTIN TX (US) (1 collaborations)
• ALAN D. SMITH of AUSTIN TX (US) (1 collaborations)
• GABRIEL WONG (1 collaborations)
• MICHAEL MANTOR of ORLANDO FL (US) (1 collaborations)
• CHANDRA SEKHAR MANDALAPU of AUSTIN TX (US) (1 collaborations)
• ERIC J. CHAPMAN of AUSTIN TX (US) (1 collaborations)
• CHINTAN BUCH of SANTA CLARA CA (US) (1 collaborations)
• SRI RANGA SAI BOYAPATI of AUSTIN TX (US) (1 collaborations)
• DEEPAK VASANT KULKARNI of AUSTIN TX (US) (1 collaborations)