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Category:Dun-Nian Yaung - WikiTrademarks Jump to content

Category:Dun-Nian Yaung

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Dun-Nian Yaung

Executive Summary

Dun-Nian Yaung is an inventor who has filed 16 patents. Their primary areas of innovation include {Interconnect structures} (10 patents), {Pixel isolation structures} (8 patents), {Assemblies, i.e. Hybrid structures} (6 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (16 patents). Their most frequent collaborators include (8 collaborations), (6 collaborations), (5 collaborations).

Patent Filing Activity

File:Dun-Nian Yaung Monthly Patent Applications.png

Technology Areas

File:Dun-Nian Yaung Top Technology Areas.png

List of Technology Areas

  • H01L27/14636 ({Interconnect structures}): 10 patents
  • H01L27/1463 ({Pixel isolation structures}): 8 patents
  • H01L27/14634 ({Assemblies, i.e. Hybrid structures}): 6 patents
  • H01L27/14683 ({Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof (not peculiar thereto): 4 patents
  • H01L27/14643 ({Photodiode arrays; MOS imagers}): 4 patents
  • H01L27/14689 ({MOS based technologies}): 4 patents
  • H01L27/1469 ({Assemblies, i.e. hybrid integration}): 4 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L27/1464 ({Back illuminated imager structures}): 2 patents
  • H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/5223 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/09 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/03848 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08054 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08056 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08112 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0903 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/12043 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1434 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76224 ({using trench refilling with dielectric materials (trench filling with polycristalline silicon): 1 patents
  • H01L27/14621 ({Colour filter arrangements}): 1 patents
  • H01L27/14627 ({Microlenses}): 1 patents
  • H01L27/14632 ({Wafer-level processed structures}): 1 patents
  • H01L21/76256 (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
  • H01L27/14687 ({Wafer level processing}): 1 patents
  • H04N25/75 (Circuitry for providing, modifying or processing image signals from the pixel array): 1 patents
  • H01L27/1461 ({characterised by the photosensitive area}): 1 patents
  • H01L28/91 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L28/87 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/14603 ({Special geometry or disposition of pixel-elements, address-lines or gate-electrodes}): 1 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
  • H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
  • H01L24/00 ({Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto}): 1 patents
  • H01L21/78 (with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
  • H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 1 patents
  • H01L23/53223 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • G02B6/4202 (Coupling light guides with opto-electronic elements): 1 patents
  • G02B6/43 (Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections): 1 patents
  • H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents

Companies

File:Dun-Nian Yaung Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Company, Ltd.: 16 patents

Collaborators

Subcategories

This category has only the following subcategory.

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