Category:Abhishek A. Sharma of Portland OR (US)

Abhishek A. Sharma of Portland OR (US)

Executive Summary

Abhishek A. Sharma of Portland OR (US) is an inventor who has filed 11 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Intel Corporation (11 patents). Their most frequent collaborators include (10 collaborations), (8 collaborations), (7 collaborations).

Patent Filing Activity

File:Abhishek A. Sharma of Portland OR (US) Monthly Patent Applications.png

Technology Areas

File:Abhishek A. Sharma of Portland OR (US) Top Technology Areas.png

List of Technology Areas

• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 3 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
• H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/08137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• G11C11/4091 (Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating): 2 patents
• H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 2 patents
• H01L2924/1437 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H10B12/20 (ELECTRONIC MEMORY DEVICES): 1 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L29/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/7841 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G02B6/42 (Coupling light guides with opto-electronic elements): 1 patents
• G02B6/12002 (of the integrated circuit kind (electric integrated circuits): 1 patents
• G02B6/12004 (of the integrated circuit kind (electric integrated circuits): 1 patents
• H10B41/00 (Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates): 1 patents
• G02B2006/12142 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
• G02B6/13 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
• H01L25/167 (the devices being of types provided for in two or more different main groups of groups): 1 patents
• H01L23/473 (by flowing liquids {(): 1 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/24051 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/24137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L2224/08121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C11/419 (forming {static} cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger): 1 patents
• G11C11/4085 ({Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge}): 1 patents
• G11C11/4094 (Bit-line management or control circuits): 1 patents
• H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05556 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1436 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

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List of Companies

• Intel Corporation: 11 patents

Collaborators

• Wilfred Gomes of Portland OR (US) (10 collaborations)
• Sagar Suthram of Portland OR (US) (8 collaborations)
• Pushkar Sharad Ranade of San Jose CA (US) (7 collaborations)
• Tahir Ghani of Portland OR (US) (5 collaborations)
• Anand S. Murthy of Portland OR (US) (5 collaborations)
• Debendra Mallik of Chandler AZ (US) (4 collaborations)
• Nitin A. Deshpande of Chandler AZ (US) (4 collaborations)
• Ravindranath Vithal Mahajan of Chandler AZ (US) (4 collaborations)
• Mauro J. Kobrinsky of Portland OR (US) (1 collaborations)
• Joshua Fryman of Corvallis OR (US) (1 collaborations)
• Stephen Morein of San Jose CA (US) (1 collaborations)
• Matthew Adiletta of Bolton MA (US) (1 collaborations)
• Michael Crocker of Portland OR (US) (1 collaborations)
• Aaron Gorius of Upton MA (US) (1 collaborations)
• Juan G. Alzate-Vinasco of Tigard OR (US) (1 collaborations)
• Fatih Hamzaoglu of Portland OR (US) (1 collaborations)
• Van H. Le of Beaverton OR (US) (1 collaborations)