Category:Hiroshi MAEJIMA

Hiroshi MAEJIMA

Executive Summary

Hiroshi MAEJIMA is an inventor who has filed 3 patents. Their primary areas of innovation include STATIC STORES (semiconductor memory devices (2 patents), {comprising cells having several storage transistors connected in series} (2 patents), Programming or data input circuits (1 patents), and they have worked with companies such as Kioxia Corporation (3 patents). Their most frequent collaborators include (1 collaborations).

Patent Filing Activity

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Technology Areas

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List of Technology Areas

G11C5/063 (STATIC STORES (semiconductor memory devices): 2 patents
G11C16/0483 ({comprising cells having several storage transistors connected in series}): 2 patents
G11C16/10 (Programming or data input circuits): 1 patents
G11C5/02 (STATIC STORES (semiconductor memory devices): 1 patents
G11C16/04 (STATIC STORES (semiconductor memory devices): 1 patents
G11C16/08 (Address circuits; Decoders; Word-line control circuits): 1 patents
G11C16/3418 (STATIC STORES (semiconductor memory devices): 1 patents
G11C16/3422 (STATIC STORES (semiconductor memory devices): 1 patents
G11C7/1039 ({using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers}): 1 patents
G11C7/08 (Control thereof): 1 patents
G11C7/1063 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
G11C7/109 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
G11C16/16 (STATIC STORES (semiconductor memory devices): 1 patents
G11C16/26 (Sensing or reading circuits; Data output circuits): 1 patents
H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
H10B41/10 (ELECTRONIC MEMORY DEVICES): 1 patents
H10B41/35 (ELECTRONIC MEMORY DEVICES): 1 patents
H10B43/10 (ELECTRONIC MEMORY DEVICES): 1 patents
H10B43/35 (ELECTRONIC MEMORY DEVICES): 1 patents