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Category:Jeremy Ecton of Gilbert AZ (US)

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Jeremy Ecton of Gilbert AZ (US)

Executive Summary

Jeremy Ecton of Gilbert AZ (US) is an inventor who has filed 10 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Intel Corporation (10 patents). Their most frequent collaborators include (10 collaborations), (7 collaborations), (7 collaborations).

Patent Filing Activity

File:Jeremy Ecton of Gilbert AZ (US) Monthly Patent Applications.png

Technology Areas

File:Jeremy Ecton of Gilbert AZ (US) Top Technology Areas.png

List of Technology Areas

  • H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L23/15 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 4 patents
  • H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 4 patents
  • H01L23/5383 ({Multilayer substrates (): 3 patents
  • H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 3 patents
  • H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
  • H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
  • H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
  • H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
  • H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/295 ({containing a filler (): 2 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/08235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/373 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/17 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/1703 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/24226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/4821 (consisting of lead-in layers inseparably applied to the semiconductor body {(electrodes): 1 patents
  • H01L2224/32146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L23/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/14 ({of a plurality of bump connectors}): 1 patents
  • H01L2224/1403 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/16152 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/3107 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/42 (Fillings or auxiliary members in containers {or encapsulations} selected or arranged to facilitate heating or cooling): 1 patents
  • H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
  • H01L2224/32245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

File:Jeremy Ecton of Gilbert AZ (US) Top Companies.png

List of Companies

  • Intel Corporation: 10 patents

Collaborators

Subcategories

This category has the following 5 subcategories, out of 5 total.

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