Category:Yasutaka NAKASHIBA

Yasutaka NAKASHIBA

Executive Summary

Yasutaka NAKASHIBA is an inventor who has filed 2 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (1 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (1 patents), {Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique} (1 patents), and they have worked with companies such as Renesas Electronics Corporation (2 patents). Their most frequent collaborators include (1 collaborations), (1 collaborations).

Patent Filing Activity

File:Yasutaka NAKASHIBA Monthly Patent Applications.png

Technology Areas

File:Yasutaka NAKASHIBA Top Technology Areas.png

List of Technology Areas

• H01L23/5225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L27/0207 ({Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique}): 1 patents
• H01L23/645 ({Inductive arrangements (): 1 patents
• H01F27/006 (Details of transformers or inductances, in general): 1 patents

Companies

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List of Companies

• Renesas Electronics Corporation: 2 patents

Collaborators

• Takayuki IGARASHI (1 collaborations)
• Tohru KAWAI (1 collaborations)