Category:Yung-Chi Lin

Yung-Chi Lin

Executive Summary

Yung-Chi Lin is an inventor who has filed 5 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (2 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (5 patents). Their most frequent collaborators include (5 collaborations), (5 collaborations), (4 collaborations).

Patent Filing Activity

File:Yung-Chi Lin Monthly Patent Applications.png

Technology Areas

File:Yung-Chi Lin Top Technology Areas.png

List of Technology Areas

• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
• H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/4821 (consisting of lead-in layers inseparably applied to the semiconductor body {(electrodes): 1 patents
• H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/29 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05009 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29009 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/182 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/351 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/03013 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/0384 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
• H01L23/49894 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L23/5383 ({Multilayer substrates (): 1 patents
• H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 1 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
• H01L23/16 (Fillings or auxiliary members in containers {or encapsulations}, e.g. centering rings (): 1 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L21/31155 (Doping the insulating layers): 1 patents
• H01L22/12 ({for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (electrical measurement of diffusions): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents

Companies

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List of Companies

• Taiwan Semiconductor Manufacturing Co., Ltd.: 5 patents

Collaborators

• Ming-Tsu Chung (5 collaborations)
• Yan-Zuo Tsai (5 collaborations)
• Yang-Chih Hsueh (4 collaborations)
• Ming-Shih Yeh (1 collaborations)