Category:Violante Moschiano: Difference between revisions

Violante Moschiano

Executive Summary

Violante Moschiano is an inventor who has filed 6 patents. Their primary areas of innovation include {Management of blocks} (2 patents), {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (2 patents), STATIC STORES (semiconductor memory devices (2 patents), and they have worked with companies such as Micron Technology, Inc. (6 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

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Technology Areas

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List of Technology Areas

• G06F3/064 ({Management of blocks}): 2 patents
• G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 2 patents
• G11C29/52 (STATIC STORES (semiconductor memory devices): 2 patents
• G11C16/102 (Programming or data input circuits): 2 patents
• G11C16/08 (Address circuits; Decoders; Word-line control circuits): 2 patents
• G06F3/0611 ({in relation to response time}): 1 patents
• G11C16/3459 ({Circuits or methods to verify correct programming of nonvolatile memory cells}): 1 patents
• G11C16/20 (Initialising; Data preset; Chip identification): 1 patents
• G11C16/3418 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C15/04 (STATIC STORES (semiconductor memory devices): 1 patents
• G11C7/1039 ({using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers}): 1 patents
• G11C7/1048 ({Data bus control circuits, e.g. precharging, presetting, equalising}): 1 patents
• G11C7/1063 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• G11C7/109 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
• G11C16/28 (STATIC STORES (semiconductor memory devices): 1 patents
• G06F3/061 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
• G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
• G11C16/32 (Timing circuits): 1 patents

Companies

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List of Companies

• Micron Technology, Inc.: 6 patents

Collaborators

• Jeffrey S. McNeil of Nampa ID (US) (3 collaborations)
• James Fitzpatrick of Laguna Niguel CA (US) (2 collaborations)
• Shyam Sunder Raghunathan (2 collaborations)
• Walter Di Francesco (2 collaborations)
• Sivagnanam Parthasarathy of Carlsbad CA (US) (1 collaborations)
• Kishore Kumar Muchherla of Fremont CA (US) (1 collaborations)
• Patrick R. Khayat of San Diego CA (US) (1 collaborations)
• Sead Zildzic of Rancho Cordova CA (US) (1 collaborations)
• Taylor Alu of Boise ID (US) (1 collaborations)
• Nicola Ciocchini of Boise ID (US) (1 collaborations)
• Guang Hu of Mountain View CA (US) (1 collaborations)
• Umberto Siciliani (1 collaborations)
• Karan Banerjee (1 collaborations)
• Tyler L. Betz of Meridian ID (US) (1 collaborations)
• Manik Advani of Fremont CA (US) (1 collaborations)
• Tomoko Ogura Iwasaki of San Jose CA (US) (1 collaborations)
• Kishore Kumar Muchherla of San Jose CA (US) (1 collaborations)
• Sead Zildzic of Folsom CA (US) (1 collaborations)
• Akira Goda (1 collaborations)
• Jonathan S. Parry of Boise ID (US) (1 collaborations)
• Jeremy Binfet of Boise ID (US) (1 collaborations)
• Kishore Kumar Muccherla of San Jose CA (US) (1 collaborations)
• Phong Sy Nguyen of Livermore CA (US) (1 collaborations)