Category:Jiann-Tyng TZENG

Jiann-Tyng TZENG

Executive Summary

Jiann-Tyng TZENG is an inventor who has filed 13 patents. Their primary areas of innovation include {Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique} (5 patents), Floor-planning or layout, e.g. partitioning or placement (5 patents), {Geometry or} layout of the interconnection structure {( (4 patents), and they have worked with companies such as TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (10 patents), Taiwan Semiconductor Manufacturing Company, Ltd. (3 patents). Their most frequent collaborators include (10 collaborations), (9 collaborations), (4 collaborations).

Patent Filing Activity

File:Jiann-Tyng TZENG Monthly Patent Applications.png

Technology Areas

File:Jiann-Tyng TZENG Top Technology Areas.png

List of Technology Areas

• H01L27/0207 ({Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique}): 5 patents
• G06F30/392 (Floor-planning or layout, e.g. partitioning or placement): 5 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 4 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• G06F30/398 (Circuit design at the physical level (physical level design for reconfigurable circuits): 2 patents
• G06F30/394 (Circuit design at the physical level (physical level design for reconfigurable circuits): 2 patents
• H01L21/76877 ({Thin films associated with contacts of capacitors}): 2 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
• H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• G06F30/39 (Circuit design at the physical level (physical level design for reconfigurable circuits): 1 patents
• H01L27/11807 (Masterslice integrated circuits): 1 patents
• H01L2027/11875 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/76802 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
• H01L21/38 (Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions): 1 patents
• H01L21/768 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
• G03F1/42 (PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices): 1 patents
• H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 1 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H03K3/0372 (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents
• G06F2119/18 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
• H01L21/76804 ({by forming tapered via holes}): 1 patents
• G11C5/14 (Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels}): 1 patents
• G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
• H01L23/50 (for integrated circuit devices, {e.g. power bus, number of leads} (): 1 patents
• H01L27/0922 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/0669 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/1029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 1 patents
• H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
• H03K19/17744 (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents

Companies

File:Jiann-Tyng TZENG Top Companies.png

List of Companies

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 10 patents
• Taiwan Semiconductor Manufacturing Company, Ltd.: 3 patents

Collaborators

• Shih-Wei PENG (10 collaborations)
• Wei-Cheng LIN (9 collaborations)
• Ching-Yu HUANG (4 collaborations)
• Wei-An LAI (3 collaborations)
• Chun-Yen LIN (2 collaborations)
• Te-Hsin CHIU (2 collaborations)
• Chia-Tien WU (2 collaborations)
• Kam-Tou SIO (2 collaborations)
• Wei-Cheng TZENG (1 collaborations)
• Szuya LIAO (1 collaborations)
• Jui-Chien HUANG (1 collaborations)
• Cheng-Yin WANG (1 collaborations)
• Ting-Yun WU (1 collaborations)
• Chih-Liang CHEN (1 collaborations)
• Charles Chew-Yuen YOUNG (1 collaborations)
• Hui-Zhong ZHUANG (1 collaborations)
• Shun Li CHEN (1 collaborations)
• Jiun-Wei LU (1 collaborations)
• Chih-Min HSIAO (1 collaborations)
• Ching-Hsu CHANG (1 collaborations)
• Hui-Ting YANG (1 collaborations)
• Lipen YUAN (1 collaborations)