Category:Chih-Chao Yang of Glenmont NY (US)

Chih-Chao Yang of Glenmont NY (US)

Executive Summary

Chih-Chao Yang of Glenmont NY (US) is an inventor who has filed 15 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), {Geometry or} layout of the interconnection structure {( (3 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), and they have worked with companies such as International Business Machines Corporation (8 patents), INTERNATIONAL BUSINESS MACHINES CORPORATION (7 patents). Their most frequent collaborators include (8 collaborations), (5 collaborations), (5 collaborations).

Patent Filing Activity

File:Chih-Chao Yang of Glenmont NY (US) Monthly Patent Applications.png

Technology Areas

File:Chih-Chao Yang of Glenmont NY (US) Top Technology Areas.png

List of Technology Areas

• H01L23/5252 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 3 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H10N50/80 (No explanation available): 3 patents
• H10N50/01 (No explanation available): 3 patents
• H10D1/474 (No explanation available): 3 patents
• H10B61/00 (Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices): 2 patents
• H10N50/20 (No explanation available): 2 patents
• H01L21/76886 ({Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances}): 1 patents
• H01L23/5256 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L23/53209 ({based on metals, e.g. alloys, metal silicides (): 1 patents
• H01L23/62 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/76801 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
• H01L21/76843 ({formed in openings in a dielectric}): 1 patents
• H01L21/76885 ({By forming conductive members before deposition of protective insulating material, e.g. pillars, studs}): 1 patents
• H10D86/80 (No explanation available): 1 patents
• H10D86/01 (No explanation available): 1 patents
• H10D86/0214 (No explanation available): 1 patents
• H10D86/481 (No explanation available): 1 patents
• H10D86/60 (No explanation available): 1 patents
• H10D87/00 (No explanation available): 1 patents
• H10D86/421 (No explanation available): 1 patents
• H01L23/5223 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L28/75 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01C7/006 (Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material (consisting of loose powdered or granular material): 1 patents
• H01C1/142 (Terminals or tapping points {or electrodes} specially adapted for resistors (in general): 1 patents
• H01C17/006 (Apparatus or processes specially adapted for manufacturing resistors (providing fillings for housings or enclosures): 1 patents
• H10D84/209 (No explanation available): 1 patents
• H01L21/02271 ({deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (): 1 patents
• H01L21/31116 ({by dry-etching}): 1 patents
• H01L21/32051 (Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers (manufacture of electrodes): 1 patents
• H01L21/32136 ({using plasmas}): 1 patents
• H01L21/76804 ({by forming tapered via holes}): 1 patents
• H01L21/76877 ({Thin films associated with contacts of capacitors}): 1 patents
• H01L23/53266 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01C1/14 (Terminals or tapping points {or electrodes} specially adapted for resistors (in general): 1 patents
• H01C17/06 (RESISTORS): 1 patents
• H01L23/5228 ({Resistive arrangements or effects of, or between, wiring layers (other resistive arrangements): 1 patents
• H10N50/10 (No explanation available): 1 patents
• G11C11/161 (using elements in which the storage effect is based on magnetic spin effect): 1 patents
• H10B61/22 (ELECTRONIC MEMORY DEVICES): 1 patents

Companies

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List of Companies

• International Business Machines Corporation: 8 patents
• INTERNATIONAL BUSINESS MACHINES CORPORATION: 7 patents

Collaborators

• Ashim Dutta of Clifton Park NY (US) (8 collaborations)
• Oscar van der Straten of Guilderland Center NY (US) (5 collaborations)
• Shravana Kumar Katakam of Lehi UT (US) (5 collaborations)
• Koichi Motoyama of Clifton Park NY (US) (4 collaborations)
• Ruilong Xie of Niskayuna NY (US) (2 collaborations)
• Baozhen Li of South Burlington VT (US) (2 collaborations)
• Brandon Noland Canedy of Cohoes NY (US) (2 collaborations)
• Nicholas Anthony Lanzillo of Wynantskill NY (US) (1 collaborations)
• Ailian Zhao of Slingerlands NY (US) (1 collaborations)
• Wu-Chang Tsai of Albany NY (US) (1 collaborations)
• Kishan Jayanand of COHOES NY (US) (1 collaborations)
• HUIMEI ZHOU of Albany NY (US) (1 collaborations)
• Shahrukh Khan of Sandy Hook CT (US) (1 collaborations)
• Yoo-Mi Lee of Montvale NJ (US) (1 collaborations)
• Huimei Zhou of Albany NY (US) (1 collaborations)
• Lili Cheng of Rexford NY (US) (1 collaborations)
• Miaomiao Wang of Albany NY (US) (1 collaborations)