Category:Srinivas V. Pietambaram of Chandler AZ (US)

Srinivas V. Pietambaram of Chandler AZ (US)

Executive Summary

Srinivas V. Pietambaram of Chandler AZ (US) is an inventor who has filed 9 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Intel Corporation (9 patents). Their most frequent collaborators include (7 collaborations), (7 collaborations), (7 collaborations).

Patent Filing Activity

File:Srinivas V. Pietambaram of Chandler AZ (US) Monthly Patent Applications.png

Technology Areas

File:Srinivas V. Pietambaram of Chandler AZ (US) Top Technology Areas.png

List of Technology Areas

• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 4 patents
• H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L23/15 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 3 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L21/481 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 2 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
• H01L23/5383 ({Multilayer substrates (): 2 patents
• H01L23/295 ({containing a filler (): 2 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/08235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/4821 (consisting of lead-in layers inseparably applied to the semiconductor body {(electrodes): 1 patents
• H01L2224/32146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L23/3107 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/42 (Fillings or auxiliary members in containers {or encapsulations} selected or arranged to facilitate heating or cooling): 1 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
• H01L2224/32245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

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List of Companies

• Intel Corporation: 9 patents

Collaborators

• Brandon C. Marin of Gilbert AZ (US) (7 collaborations)
• Gang Duan of Chandler AZ (US) (7 collaborations)
• Jeremy Ecton of Gilbert AZ (US) (7 collaborations)
• Bohan Shan of Chandler AZ (US) (4 collaborations)
• Benjamin T. Duong of Phoenix AZ (US) (3 collaborations)
• Suddhasattwa Nad of Chandler AZ (US) (3 collaborations)
• Tarek A. Ibrahim of Mesa AZ (US) (2 collaborations)
• Yosuke Kanaoka of Chandler AZ (US) (2 collaborations)
• Minglu Liu of Chandler AZ (US) (2 collaborations)
• Haobo Chen of Chandler AZ (US) (2 collaborations)
• Kristof Kuwawi Darmawikarta of Chandler AZ (US) (1 collaborations)
• Robert May of Chandler AZ (US) (1 collaborations)
• Sri Ranga Sai Boyapati of Austin TX (US) (1 collaborations)
• Chung Kwang Christopher Tan of Portland OR (US) (1 collaborations)
• Aleksandar Aleksov of Chandler AZ (US) (1 collaborations)
• Mohamed R. Saber of College Station TX (US) (1 collaborations)
• Hanyu Song of Chandler AZ (US) (1 collaborations)
• Fanyi Zhu of Gilbert AZ (US) (1 collaborations)
• Bai Nie of Chandler AZ (US) (1 collaborations)
• Deniz Turan of Chander AZ (US) (1 collaborations)
• Yonggang Li of Chandler AZ (US) (1 collaborations)
• Naiya Soetan-Dodd of Mesa AZ (US) (1 collaborations)
• Shuren Qu of Gilbert AZ (US) (1 collaborations)