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Category:Thomas Workman of San Jose CA (US)

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Thomas Workman of San Jose CA (US)

Executive Summary

Thomas Workman of San Jose CA (US) is an inventor who has filed 4 patents. Their primary areas of innovation include {Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected} (2 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (2 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (2 patents), and they have worked with companies such as ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. (3 patents), Adeia Semiconductor Bonding Technologies Inc. (1 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

File:Thomas Workman of San Jose CA (US) Monthly Patent Applications.png

Technology Areas

File:Thomas Workman of San Jose CA (US) Top Technology Areas.png

List of Technology Areas

  • H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
  • H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/67132 ({Apparatus for placing on an insulating substrate, e.g. tape}): 1 patents
  • H01L21/6838 (for supporting or gripping (for conveying): 1 patents
  • H01L21/6836 ({Wafer tapes, e.g. grinding or dicing support tapes (adhesive tapes in general): 1 patents
  • H01L2221/68327 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2221/68381 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/6835 ({using temporarily an auxiliary support}): 1 patents
  • H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
  • H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/014 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/29 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 1 patents
  • H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/29187 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80447 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80455 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/83011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/152 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/473 (by flowing liquids {(): 1 patents
  • H01L23/367 (Cooling facilitated by shape of device {(): 1 patents
  • H01L2224/08238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/351 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

File:Thomas Workman of San Jose CA (US) Top Companies.png

List of Companies

  • ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.: 3 patents
  • Adeia Semiconductor Bonding Technologies Inc.: 1 patents

Collaborators

Subcategories

This category has the following 13 subcategories, out of 13 total.

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