Category:Shuangqiang Luo of Boise ID (US)

Shuangqiang Luo of Boise ID (US)

Executive Summary

Shuangqiang Luo of Boise ID (US) is an inventor who has filed 6 patents. Their primary areas of innovation include ELECTRONIC MEMORY DEVICES (5 patents), ELECTRONIC MEMORY DEVICES (5 patents), ELECTRONIC MEMORY DEVICES (3 patents), and they have worked with companies such as Lodestar Licensing Group LLC (6 patents). Their most frequent collaborators include (4 collaborations), (3 collaborations), (2 collaborations).

Patent Filing Activity

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Technology Areas

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List of Technology Areas

• H10B41/27 (ELECTRONIC MEMORY DEVICES): 5 patents
• H10B43/27 (ELECTRONIC MEMORY DEVICES): 5 patents
• H10B41/41 (ELECTRONIC MEMORY DEVICES): 3 patents
• H10B41/35 (ELECTRONIC MEMORY DEVICES): 3 patents
• H10B43/35 (ELECTRONIC MEMORY DEVICES): 3 patents
• H10B43/40 (ELECTRONIC MEMORY DEVICES): 3 patents
• G11C5/063 (STATIC STORES (semiconductor memory devices): 2 patents
• H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 2 patents
• H01L21/76877 ({Thin films associated with contacts of capacitors}): 2 patents
• H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H10B41/10 (ELECTRONIC MEMORY DEVICES): 1 patents
• H10B43/10 (ELECTRONIC MEMORY DEVICES): 1 patents
• G11C5/025 ({Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device (geometrical lay-out of the components in integrated circuits,): 1 patents
• G11C5/06 (STATIC STORES (semiconductor memory devices): 1 patents
• H01L21/76838 ({characterised by the formation and the after-treatment of the conductors (etching for patterning the conductors): 1 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L24/14 ({of a plurality of bump connectors}): 1 patents
• H01L21/31144 ({using masks}): 1 patents
• H01L21/76804 ({by forming tapered via holes}): 1 patents
• H01L21/76805 ({the opening being a via or contact hole penetrating the underlying conductor}): 1 patents
• H01L21/76816 ({Aspects relating to the layout of the pattern or to the size of vias or trenches (layout of the interconnections per se): 1 patents
• H01L21/76826 ({by contacting the layer with gases, liquids or plasmas}): 1 patents
• H01L21/76895 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
• H01L23/535 (including internal interconnections, e.g. cross-under constructions {(internal lead connections): 1 patents

Companies

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List of Companies

• Lodestar Licensing Group LLC: 6 patents

Collaborators

• Indra V. Chary of Boise ID (US) (4 collaborations)
• Justin B. Dorhout of Boise ID (US) (3 collaborations)
• Rita J. Klein of Boise ID (US) (2 collaborations)
• Xuan Li (1 collaborations)
• Adeline Yii (1 collaborations)
• Lifang Xu of Boise ID (US) (1 collaborations)
• John D. Hopkins of Meridian ID (US) (1 collaborations)
• Roger W. Lindsay of Boise ID (US) (1 collaborations)